Agilent Technologies ESG Betriebsanweisung Seite 28

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12 Chapter 1
Signal Generator Overview
Front Panel Overview
25. Preset Key
This hardkey is used to set the signal generator to a known state (factory or user-defined).
26. Standby LED
This yellow LED indicates when the signal generator power switch is set to the standby
condition.
27. Line Power LED
This green LED indicates when the signal generator power switch is set to the on position.
28. Power Switch
This switch activates full power to the signal generator when set to the on position, and
deactivates all signal generator functions when in standby mode. In standby mode, the signal
generator remains connected to the line power and power is supplied to some internal circuits.
29. SYMBOL SYNC (Input Connector)
The CMOS compatible SYMBOL SYNC connector accepts an externally supplied symbol sync
for digital modulation applications. The expected input is a TTL or CMOS bit clock signal. It
may be used in two modes. When used as a symbol sync in conjunction with a data clock, the
signal must be high during the first data bit of the symbol. The signal must be valid during
the falling edge of the data clock signal and may be a single pulse or continuous. When the
SYMBOL SYNC itself is used as the (symbol) clock, the CMOS falling edge is used to clock the
DATA signal.
The maximum clock rate is 50 MHz. The damage levels are > +8 and <
4 V.
This female BNC connector is provided on signal generators with Option 001 or 002. On
signal generators with Option 1EM, this input is relocated to a rear panel SMB connector.
When using the real-time W-CDMA uplink personality, this connector should not be used to
connect the external baseband generator data clock. The BASEBAND GEN REF IN connector
should be used instead.
30. DATA CLOCK (Input Connector)
The TTL/CMOS compatible DATA CLOCK connector accepts an externally supplied
data-clock input for digital modulation applications. The expected input is a TTL or CMOS bit
clock signal where the rising edge is aligned with the beginning data bit. The falling edge is
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