Agilent Technologies ESG Spezifikationen Seite 210

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3-28 Programming Guide
Remote Data Transfer ESG Family Signal Generators
Data Downloads Directly into Pattern RAM
specific address in PRAM.
Data Limitations
Total (data bits plus control bits) download size limitations are 1 Mbyte for Option UN8
and 8 Mbytes for Option UN9.
It is important to remember that a data pattern file containing 1 Mbyte of data for
subsequent modulation must also contain another 7 Mbytes of control information. A file of
this size would require a signal generator with Option UN9 and its 8 Mbyte pattern RAM.
The largest amount of modulation data for a waveform in an Option UN8 signal generator
is approximately 1 Mbit, leaving enough room for the required 7 Mbits control bits.
Data Volatility
PRAM data is volatile.
Data stored in PRAM will not survive a line power cycle. Also, it is overwritten whenever
the mode is changed and a new TDMA format is activated.
Table 3-2 Data and Control Bit Definitions for a Pattern RAM Address
Bit Function Value Comments
0 Data 0/1 This bit is the data to be modulated. This bit is a “don’t care”
when burst (bit 2) is set to 0.
1 Reserved 0 Always 0.
2 Burst 0/1 Set to 1 = RF on.
Set to 0 = RF off.
For non-bursted, non-TDMA systems, this bit is set to 1 for all
memory locations, leaving the RF output on continuously. For
framed data, this bit is set to 1 for the valid data bits for on
timeslots and 0 for all off timeslots.
3 Reserved 0 Always 0
4 Reserved 1 Always 1
5 Reserved 0 Always 0
6Event 1
Output
0/1 Setting this bit to 1 causes a level transition at the EVENT 1
BNC connector. This can be used for many functions. For
example, as a marker output to trigger external hardware when
the data pattern has restarted, or to create a data-synchronous
pulse train by toggling this bit in alternate addresses.
7 Pattern Reset 0/1 Set to 0 = continue to next sequential memory address.
Set to 1 = end of memory and restart memory playback.
This bit is set to 0 for all bytes except the last address of PRAM.
For the last address (byte) of PRAM, it is set to 1 to restart the
pattern.
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