Agilent Technologies N4970A Bedienungsanleitung PDF herunterladen (Seite 26)

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Agilent N4877A, N1070A CDR Solutions and N4876A 28.4 Gb/s Multiplexer 2:1

N4877A, N1075A: Electrical and optical clock recovery solution

for BER and waveform analysis

• Continuous, un-banded tuning from 50 Mb/s to 32 Gb/s

• Ultra low residual jitter: < 100 femtoseconds rms

• Golden PLL operation with a tunable loop bandwidth from

30 kHz to 20 MHz for configurable standard compliant test

• PLL BW/jitter transfer and phase noise/jitter spectrum

analysis

Both bit-error-ratio-testers (BERTs) and DCA’s require a clock signal to

synchronize the measurement system to the incoming data stream. When

the necessary synchronous clock/trigger is not available, a common solu-

tion is to derive a clock from the data being measured. The 83496B clock

recovery module for the 86100D and N4877A/N1070A standalone clock

recovery instrument provide ideal performance for waveform analysis and

BER test.

They can derive a clock from NRZ signals with rates as low as 50 Mb/s, as

high as 32 Gb/s, and any rate between, providing the ultimate in flexibility

and value. With jitter as low as 100 fs rms, the residual jitter of the output

clock is virtually negligible, allowing accurate measurements of very low

levels of signal jitter and high margin in jitter tolerance/receiver tests.

• The 83496B operates from 50 Mb/s to 14.2 Gb/s and can be

configured for both optical and electrical signals

• The N4877A and N1070A operate from 50 Mb/s to 32 Gb/s and

provide clock, auxiliary clock, and demultiplexed data outputs

• The N4877A operates on electrical signals, while the N1070 adds an

optical coupler/converter box allowing analysis of both optical and

electrical signals

PLL and jitter spectrum analysis

Use 86100CU-400 software to make fast, accurate and repeatable

measurements of phase-locked loop (PLL) bandwidth/jitter transfer. With

a precision jitter source, the 83496B, N4877, and N1070A can be config-

ured as a jitter receiver to create a PLL stimulus-response test system.

Specifications

• Data rates: 50 Mb/s to 32 Gb/s, continuously tunable

• Tunable loop bandwidth up to 20 MHz

• Optical inputs: MMF to 16 Gb/s, SMF to 32 Gb/s

• Residual jitter as low as 100 fs rms

• Demultiplexed data (outputs can be swapped)

• Recovered clock can be divided by 1, 2, 4

• Input sensitivity: 25 mV differential, 50 Ω

N4876A 28.4 Gb/s multiplexer 2 : 1

• Extends the pattern generator data rate to up to 28.4 Gb/s

• Transparent for timing jitter

• Operation via J-BERT user interface or as stand-alone

Accurate characterization up to 28 Gb/s

The N4876A 28 Gb/s multiplexer allows to extend the pattern generator

data rate of the J-BERT N4903B and ParBERT 81250A up to 28.4 Gb/s.

Design and test engineers in the semiconductor, communications, storage

and computer industry can now accurately characterize the next genera-

tion of serial interfaces. N4876A is transparent to jitter, so when using it

with the J-BERT N4903B, calibrated RJ and PJ can be generated.

28.4 Gb/s PRBS output signal of multiplexer N4876A

Target applications

• IEEE 802.3 ba 100 GBASE-LR4, -ER4 interfaces operating at data

rates of 25.78125 Gb/s, T11 16G or 32G Fibre Channel

• OIF CEI backplanes operating between 19.9 and 28 Gb/s

• Clean generator for transmitter test

• Stressed generator for receiver tolerance testing

Specifications

• Output data rate: 1.25 to 27.0 Gb/s (28.4 Gb/s when using J-BERT

N4903B Option D14)

• Output amplitude: 0.05 to 1.800 V in a –2 to +3 V window

• Intrinsic jitter: 1 ps rms typ. for clock pattern

• Transition time: 10 ps typ. (20 to 80% ), Crossing point: 20 to 80%

• Clock/2 jitter: 45 to 55% shorter/longer even bits than odd bits

• Output: Differential or single-ended, 50 Ω

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