Agilent Technologies HP 8642A/B Spezifikationen Seite 125

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Considerations for the Loop Suppression Verification
Verification of the loop suppression may be prevented by excessive noise
close to the carrier, by a large spur within the bandwidth of the PLL, or
by injection locking.
It should be assumed that an indicated Accuracy Specification Degradation
applies at all offset frequencies (both inside and outside of the loop
bandwidth).
If the Detector Constant and VCO Tune Constant are known to be
accurate, the PTR is less than 10 MHz, and the VCO tuning port
bandwidth is less than PLL BW x 10, then a measurement without Loop
Suppression Verification will be accurate.
2-56 Calibr Process: 3>N w/PLL
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