Agilent-technologies Logic DDR2 Dimm High Speed Pro FS2334 Bedienungsanleitung Seite 1

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FuturePlus Systems
Corporation
DDR2 DIMM HIGH SPEED PROBE
FS2334
Users Manual
For use with Agilent Technologies Logic Analyzers
Revision 1.4
FuturePlus is a registered trademark of FuturePlus Systems Corporation
Copyright 2006 FuturePlus Systems Corporation
Seitenansicht 0
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Inhaltsverzeichnis

Seite 1 - DDR2 DIMM HIGH SPEED PROBE

FuturePlus Systems Corporation DDR2 DIMM HIGH SPEED PROBE FS2334 Users Manual For use with Agilent Technologies

Seite 2

10FS2334 Frontside layout FS2334 Backside layout Test Points There are several test point on the board. The first set of test points are used to se

Seite 3

11 DM2_DQS11 is not brought to the logic analyzer, but it can be probed at TP4 DQS5n is not brought to the logic analyzer, but it can be probed at TP

Seite 4 - How to reach us

12Recommended Logic Analyzer Card Requirements and Configuration files 169xx Analyzer Type Timing Analysis State Analysis 667MT/s or slower 16753/4

Seite 5 - Product Warranty

13 Logic Analyzer card configurations – Note: These are all for unbuffered DIMM probing FS234_1 2 machine, 7 Card 800MT/s Read and Write configurat

Seite 6 - Software License Agreement

14 Software Requirements Setting up the 169xx Analyzer A CD containing the 16900 software is included in the FS1136 package. The CD contains a setup

Seite 7 - Introduction

15 Offline Analysis Offline analysis allows a user to be able to analyze a trace offline at a PC so it frees up the analyzer for another person to us

Seite 8 - FS2334 Probe Description

16 After the decoder has loaded, select Preferences from the overview screen and set the preferences to their correct value in order to decode the tr

Seite 9

17 TimingZoom Analysis The TimingZoom feature of the 1690x logic analyzer allows for efficient timing analysis of all the signals on the DDR2 DIMM bu

Seite 10 - Test Points

18 State Analysis Overview There are several choices for State mode analysis using the FS2334 DDR2 probe depending on the speed of the data bus being

Seite 11

19 State Analysis Operation – Read and Write at 667MT/s or slower State mode capture is performed by using both edges of CK0. This double probing o

Seite 12

2 How to reach us...4 Product War

Seite 13

20 The process for setting sampling positions at speeds of 800MT/s: This procedure requires the probe user to capture TimingZoom traces and use the

Seite 14 - Software Requirements

21 State analysis calibration procedure This process is in large part the same for both use in the 7 card Read and Write configuration at 800MT/s an

Seite 15 - Offline Analysis

22 4) Repeat this procedure using the next rising edge of Write – Command:CK2_TZ and the corresponding data burst cycle (it will be right next to th

Seite 16

23label to be set to the same value. Then you can drag the blue sample position bar back to the right to place it in the position you measured in st

Seite 17 - TimingZoom Analysis

24 Adjusting the sampling positions with controlled stimulus This is a special case requiring special stimulus of the DDR2 DIMM bus. This may involve

Seite 18 - State Analysis

25signal edges change relative to the Data Strobes (clock input) and this will be close the valid eye openings for all the Data signals. Run Auto Sam

Seite 19

26 State Display The following figure shows a typical DDR2 screen display. Because the analyzer may sample data on both edges of the clock (FS1117)

Seite 20

27 DDR2 Protocol Checking and Performance Tool (FS1140) The FS1140 DDR2 Protocol Checking and Performance Tool is a separate VBA-based application th

Seite 21

28 Setting up the FS1140 DDR2 Tool The FS1140 DDR2 tool has to be set-up with the DDR2 bus parameters being used on the target system in order to i

Seite 22

29 Functional and Performance Analysis – NOTE: The Functional Performance portion of this software will NOT work with 2 FRAME configurations This wi

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3Overview... 18

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30Export This function takes the data captured and exports it in .csv format to a location the user selects. Repetitive Run This function allows the

Seite 26 - State Display

32 Appendix FS2334 Signal to Logic Analyzer Connector and Channel Mapping The following table shows how the FS2334 DDR2 Probe connects DDR2 DIMM sign

Seite 27 - Loading the FS1140

33Logic Analyzer channel number SAMTEC Pin number SAMTEC Pin number Logic Analyzer channel number Signal name/Logical Signal Name 20K ohm to Ground 4

Seite 28

34Header 2 - Command Logic Analyzer channel number SAMTEC Pin number SAMTEC Pin number Logic Analyzer channel number Signal name/Logical Signal Name

Seite 29 - Statistics

35Logic Analyzer channel number SAMTEC Pin number SAMTEC Pin number Logic Analyzer channel number Signal name/Logical Signal Name Ground 59 60 D13 NC

Seite 30 - Timing Analysis

36Header 3 - Write Logic Analyzer channel number SAMTEC Pin number SAMTEC Pin number Logic Analyzer channel number Signal name/Logical Signal Name Gr

Seite 31

37Logic Analyzer channel number SAMTEC Pin number SAMTEC Pin number Logic Analyzer channel number Signal name/Logical Signal Name Ground 59 60 D13 DQ

Seite 32 - Header 1 - Command

38Header 4 - Write Logic Analyzer channel number SAMTEC Pin number SAMTEC Pin number Logic Analyzer channel number Signal name/Logical Signal Name Gr

Seite 33

39Logic Analyzer channel number SAMTEC Pin number SAMTEC Pin number Logic Analyzer channel number Signal name/Logical Signal Name Ground 59 60 D13 DQ

Seite 34 - Header 2 - Command

4 How to reach us For Technical Support: FuturePlus Systems Corporation 36 Olde English Road Bedford NH 03110 TEL: 603-471-2734 FAX: 603-471-273

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40Header 5 - Write Logic Analyzer channel number SAMTEC Pin number SAMTEC Pin number Logic Analyzer channel number Signal name/Logical Signal Name Gr

Seite 36 - Header 3 - Write

41Logic Analyzer channel number SAMTEC Pin number SAMTEC Pin number Logic Analyzer channel number Signal name/Logical Signal Name Ground 59 60 D13 CB

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42 Header 14 – ECC bits only this header is not in any config file Logic Analyzer channel number SAMTEC Pin number SAMTEC Pin number Logic Analyzer c

Seite 38 - Header 4 - Write

43Logic Analyzer channel number SAMTEC Pin number SAMTEC Pin number Logic Analyzer channel number Signal name/Logical Signal Name 20K ohm to Ground 5

Seite 39

44Header 6 – Write Logic Analyzer channel number SAMTEC Pin number SAMTEC Pin number Logic Analyzer channel number Signal name/Logical Signal Name G

Seite 40 - Header 5 - Write

45Logic Analyzer channel number SAMTEC Pin number SAMTEC Pin number Logic Analyzer channel number Signal name/Logical Signal Name 20K ohm to Ground 5

Seite 41

46 Header 7 -Write Logic Analyzer channel number SAMTEC Pin number SAMTEC Pin number Logic Analyzer channel number Signal name/Logical Signal Name Gr

Seite 42

47Logic Analyzer channel number SAMTEC Pin number SAMTEC Pin number Logic Analyzer channel number Signal name/Logical Signal Name 20K ohm to Ground 5

Seite 43

48 Header 8 - Write Logic Analyzer channel number SAMTEC Pin number SAMTEC Pin number Logic Analyzer channel number Signal name/Logical Signal Name G

Seite 44 - Header 6 – Write

49Logic Analyzer channel number SAMTEC Pin number SAMTEC Pin number Logic Analyzer channel number Signal name/Logical Signal Name 20K ohm to Ground 5

Seite 45

5 Product Warranty Due to wide variety of possible customer target implementations, the FS2334 DDR2 DIMM probe has a 30 day acceptance period by the

Seite 46 - Header 7 -Write

50Header 12 – Read – Duplicates - only data signals Logic Analyzer channel number SAMTEC Pin number SAMTEC Pin number Logic Analyzer channel number S

Seite 47

51Logic Analyzer channel number SAMTEC Pin number SAMTEC Pin number Logic Analyzer channel number Signal name/Logical Signal Name Ground 59 60 D13 DQ

Seite 48 - Header 8 - Write

52Header 10 - Read Duplicates - only data signals Logic Analyzer channel number SAMTEC Pin number SAMTEC Pin number Logic Analyzer channel number Si

Seite 49

53Logic Analyzer channel number SAMTEC Pin number SAMTEC Pin number Logic Analyzer channel number Signal name/Logical Signal Name Ground 59 60 D13 DQ

Seite 50

54Header 11 – Read Duplicates - only data signals Logic Analyzer channel number SAMTEC Pin number SAMTEC Pin number Logic Analyzer channel number Sig

Seite 51

55Logic Analyzer channel number SAMTEC Pin number SAMTEC Pin number Logic Analyzer channel number Signal name/Logical Signal Name Ground 59 60 D13 CB

Seite 52

56Header 9 – Read Duplicates - only data signals Logic Analyzer channel number SAMTEC Pin number SAMTEC Pin number Logic Analyzer channel number Sig

Seite 53

57Logic Analyzer channel number SAMTEC Pin number SAMTEC Pin number Logic Analyzer channel number Signal name/Logical Signal Name Ground 59 60 D13 DQ

Seite 54

58Header 13 – Read Duplicates - only data signals Logic Analyzer channel number SAMTEC Pin number SAMTEC Pin number Logic Analyzer channel number Si

Seite 55

59Logic Analyzer channel number SAMTEC Pin number SAMTEC Pin number Logic Analyzer channel number Signal name/Logical Signal Name Ground 59 60 D13 DQ

Seite 56

6 Software License Agreement IMPORTANT - Please read this license agreement carefully before opening the media envelope. Rights in the software are

Seite 57

7 Introduction Thank you for purchasing the FuturePlus Systems FS2334 DDR2 DIMM Interposer Logic Analyzer Probe. We think you will find the FS2334, a

Seite 58

8 FS2334 Probe Description The FS2334 DDR2 Probe allows you to perform timing analysis measurements on DDR2 DIMM busses. It also provides a Protocol

Seite 59

9 Signal Assignments on Probe Pods The overlap in the bit ranges (for DQxx) signals between pods occurs because the bits are assigned to pods in the

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