Agilent Technologies 16800 Series Bedienungsanleitung PDF herunterladen (Seite 2)

PC board

JTAG

Xilinx cable

Parallel

or USB

FPGA

Probe outputs

on FPGA pins

SW application supported

by 1680, 1690, 16800 and

16900 Series logic analyzers

ATC2

Insert ATC2 core with

Xilinx Core Inserter

or EDK

To FPGA pins

2X TDM

Selection MUX

4-128

Select

4-128

JTAG

4-128

Change signal bank

selection via JTAG

Figure 3. Access up to 128 internal signals for each debug pin. Select cores with 1, 2, 4,

8, 16, 32, or 64 signal banks. Signal banks all have identical width (4 to 128 signals

wide) determined by the number of pins you devote for debug. Each pin provides

sequential access to 1 signal on every input bank. Using an optional 2X time division

compression in state mode, each pin can access 2 signals per bank.

Figure 2. Create a timesaving FPGA measurement system. Insert an ATC2 (Agilent Trace

Core) core into your FPGA design. With the application running on your logic analyzer

you control which group of internal signals to measure via JTAG.

Figure 1. The FPGA dynamic

probe application endows your

logic analyzer with unique

productivity enhancements to

find problems more quickly.

Debug your FPGAs faster and more

effectively with a logic analyzer

The Agilent FPGA dynamic probe,

used in conjunction with an

Agilent logic analyzer, provides

the most effective solution for

debugging problems [simple

through complex]. The FPGA

dynamic probe lets you:

• View internal activity —

With a logic analyzer, you are

normally limited to measuring

signals at the periphery of the

FPGA. With the FPGA dynamic

probe, you can now access

signals internal to the FPGA.

You can measure up to 128

internal signals for each

external pin dedicated to

debug, unlocking visibility into

your design than you never

had before.

• Make multiple measurements

in seconds — Moving probe

points internal to an FPGA

used to be time consuming.

Now, in less than a second you

can easily measure a different

set of internal signals —

without design changes. FPGA

timing stays constant when

you select new sets of internal

signals for probing.

• Leverage the work you did in

your design environment —

The FPGA dynamic probe is

the industry’s first tool that

maps internal signal names

from your FPGA design tool

to your logic analyzer.

Eliminate unintentional

mistakes and save hours of

time with this automatic

setup of signal and bus

names on your logic analyzer.

1 2 3 4 5 6 7 8

Kommentare zu diesen Handbüchern

Keine Kommentare

Agilent Technologies 16800 Series Bedienungsanleitung Seite 2

Kommentare zu diesen Handbüchern

Verwandte Produkte und Handbücher für Multimeter Agilent Technologies 16800 Series